Hardware Design using Digital Components and Its Implementation on FPGA for SF 47 , SF 48, SF 49 , SF 50
Foundation_Course_Digital_Hardware_Design_1 st & 2nd_Year_Electronics & Electricals_Engineering__2023_2024
Program objective of Project-based Learning cum Internship Program in VLSI: –
1. Understanding Hardware Design of VLSI & Embedded Domain
2. Hands-on Experience Design and
3. Optimization Techniques
4. Industry-Relevant Skills
5. Project Development
6. Networking and Industry Exposure
Summary of the program:-
1. Introduction of VLSI & Embedded flow
2. From this training, trainees can identify the interest area in VLSI & Embedded
3. 100% hands-on session from the first day of the learning
4. Focus on Major and minor project-based internship
5. From this training, students can identify their final-year project
6. Tools and Hardware board will be provided by the academy only
Key takeaways from the training program: –
1. How to develop the logical approach using digital components in hardware design and Implementation of FPGA
2. Hardware Circuit design using digital components of Real-time applications like signed calculator, multiplier,
divider, digital clock, stopwatch timer, and LED blinker.
3. Understanding of FPGA Architecture from Idea to programming in both hardware design and HDL- Verilog
What Will I Learn?
- 1. How to develop the logical approach using digital components in hardware design and Implementation of FPGA
- 2. Hardware Circuit design using digital components of Real-time applications like signed calculator, multiplier,
- divider, digital clock, stopwatch timer, and LED blinker.
- 3. Understanding of FPGA Architecture from Idea to programming in both hardware design and HDL- Verilog
Course Content
|| Hardware design || Brainstorming Session 1 & 2 || Tool Demo
-
Brainstorming session 1 & 2 || Designing of gates || Tool Demo
01:15:35
Hardware Design – Designing of Adder and Its application.
Digital Multiplexer
Tool Demo
Demux and Its Application
2s Complement and Project Sign Calculator
How to use the Multiple bits on the multiple inputs and outputs
Hardware Design of Multiplier and Design
Encoder & Decoder Learning & Design
Hardware Design of Digital Divider Circuit
Hardware Design using Verilog
Verilog : Introduction of gate level with example
Verilog Gate Level 2 || How Gate Level help to design Sign Calculator || Introduction of Operator
Verilog Operator Class
Verilog Operator
Sequential_Design
Sequential Gated Latch and Importance of X & Z
Sequential Gated Latch and Bug
SR bug Solved JK Failed and MS JK
Edge Based Circuit Using MS JK FF
DFF & TFF
Verilog – Behavioral Modelling
About the instructor
8 Courses
285 students