FPGA RTL System
- Home
- FPGA RTL System
FPGA RTL System
1st Year/2nd Year
Introduced
1st Year/2nd Year
- Hardware Digital Design & Development
- ISE Tool Flow
- FPGA Introduction
- Hardware
- Implementation of LED & SSD
- HDL Verilog - Beginner
- Certification Test
1st Year/2nd Year
Expanded
1st Year/2nd Year
- Vivado Tool Flow
- HDL Verilog - Intermediate
- HDL Verilog - Advanced
- HDL -Verilog Synthesis Technique
- HDL FPGA Implementation LED & SSD
- Certification Test
3rd Year-5th Semester
Expanded
3rd Year-5th Semester
- HDL VHDL - Advanced
- HDL VHDL - Advanced
- HDL VHDL - Advanced
- HDL -VHDL Synthesis Technique
- HDL FPGA Implementation LED & SSD
- Certification Test
3rd Year- 6th Semester
Expanded
3rd Year- 6th Semester
- FPGA Architecture Basic
- FPGA Architecture Advanced
- How to use FPGA Memories RAM/BRAM
- How to use FPGA Clock & IO Resources
- How to Use FPGA CLB
- Certification Test
4th Year 7th Semester
Expanded
4th Year 7th Semester
- HDL On-chip ILA FPGA Debugging
- HDL SPI & I2C Implementation
- HDL UART FPGA Implementation
- HDL KEYPAD or KEYBOARD FPGA Implementation
- HDL LCD FPGA Implementation
- HDL 3-Axis Accelerometer Implementation
4th Year 8th Semester
Expanded
4th Year 8th Semester
- HDL PDM Microphone & PWM Audio Output Implementation
- HDL on Chip xADC FPGA Implementation
- HDL Temperature Sensor FPGA Implementation
- HDL VGA FPGA Implementation
- HDL 10/100 Ethernet FPGA Implementation
- Future Topics
Visitor Count: 22